14 static size_t get_workspace_size(
layer l){
15 return (
size_t)l.
h*l.
w*l.
size*l.
size*l.
n*
sizeof(float);
21 float center = (l.
size-1) / 2.;
22 for(f = 0; f < l.
n; ++f){
23 for(j = 0; j < l.
size; ++j){
24 for(i = 0; i < l.
size; ++i){
25 float val = (1 - fabs(i - center)) * (1 - fabs(j - center));
35 layer make_deconvolutional_layer(
int batch,
int h,
int w,
int c,
int n,
int size,
int stride,
int padding,
ACTIVATION activation,
int batch_normalize,
int adam)
52 l.
weights = calloc(c*n*size*size,
sizeof(
float));
55 l.
biases = calloc(n,
sizeof(
float));
62 for(i = 0; i < n; ++i){
85 l.
scales = calloc(n,
sizeof(
float));
87 for(i = 0; i < n; ++i){
91 l.
mean = calloc(n,
sizeof(
float));
92 l.
variance = calloc(n,
sizeof(
float));
103 l.
m = calloc(c*n*size*size,
sizeof(
float));
104 l.
v = calloc(c*n*size*size,
sizeof(
float));
105 l.
bias_m = calloc(n,
sizeof(
float));
106 l.
scale_m = calloc(n,
sizeof(
float));
107 l.
bias_v = calloc(n,
sizeof(
float));
108 l.
scale_v = calloc(n,
sizeof(
float));
119 l.m_gpu = cuda_make_array(l.
m, c*n*size*size);
120 l.v_gpu = cuda_make_array(l.
v, c*n*size*size);
121 l.bias_m_gpu = cuda_make_array(l.
bias_m, n);
122 l.bias_v_gpu = cuda_make_array(l.
bias_v, n);
123 l.scale_m_gpu = cuda_make_array(l.
scale_m, n);
124 l.scale_v_gpu = cuda_make_array(l.
scale_v, n);
126 l.weights_gpu = cuda_make_array(l.
weights, c*n*size*size);
127 l.weight_updates_gpu = cuda_make_array(l.
weight_updates, c*n*size*size);
129 l.biases_gpu = cuda_make_array(l.
biases, n);
130 l.bias_updates_gpu = cuda_make_array(l.
bias_updates, n);
136 l.mean_gpu = cuda_make_array(0, n);
137 l.variance_gpu = cuda_make_array(0, n);
139 l.rolling_mean_gpu = cuda_make_array(0, n);
140 l.rolling_variance_gpu = cuda_make_array(0, n);
142 l.mean_delta_gpu = cuda_make_array(0, n);
143 l.variance_delta_gpu = cuda_make_array(0, n);
145 l.scales_gpu = cuda_make_array(l.
scales, n);
146 l.scale_updates_gpu = cuda_make_array(0, n);
153 cudnnCreateTensorDescriptor(&l.dstTensorDesc);
154 cudnnCreateTensorDescriptor(&l.normTensorDesc);
155 cudnnSetTensor4dDescriptor(l.dstTensorDesc, CUDNN_TENSOR_NCHW, CUDNN_DATA_FLOAT, l.
batch, l.
out_c, l.
out_h, l.
out_w);
156 cudnnSetTensor4dDescriptor(l.normTensorDesc, CUDNN_TENSOR_NCHW, CUDNN_DATA_FLOAT, 1, l.
out_c, 1, 1);
163 fprintf(stderr,
"deconv%5d %2d x%2d /%2d %4d x%4d x%4d -> %4d x%4d x%4d\n", n, size, size, stride, w, h, c, l.
out_w, l.
out_h, l.
out_c);
171 for(i = 0; i < l.
n; ++i){
201 cuda_free(l->delta_gpu);
202 cuda_free(l->output_gpu);
209 cuda_free(l->x_norm_gpu);
215 cudnnSetTensor4dDescriptor(l->dstTensorDesc, CUDNN_TENSOR_NCHW, CUDNN_DATA_FLOAT, l->
batch, l->
out_c, l->
out_h, l->
out_w);
216 cudnnSetTensor4dDescriptor(l->normTensorDesc, CUDNN_TENSOR_NCHW, CUDNN_DATA_FLOAT, 1, l->
out_c, 1, 1);
232 for(i = 0; i < l.
batch; ++i){
234 float *b = net.
input + i*l.
c*l.
h*l.
w;
237 gemm_cpu(1,0,m,n,k,1,a,m,b,n,0,c,n);
263 for(i = 0; i < l.
batch; ++i){
268 float *a = net.
input + i*m*k;
274 gemm_cpu(0,1,m,n,k,1,a,k,b,k,1,c,n);
283 float *c = net.
delta + i*n*m;
285 gemm_cpu(0,0,m,n,k,1,a,k,b,n,1,c,n);
294 float decay = a.
decay;
void backward_bias(float *bias_updates, float *delta, int batch, int n, int size)
void update_deconvolutional_layer(layer l, update_args a)
void(* update)(struct layer, update_args)
void(* forward_gpu)(struct layer, struct network)
void denormalize_deconvolutional_layer(layer l)
void forward_deconvolutional_layer(const layer l, network net)
void add_bias(float *output, float *biases, int batch, int n, int size)
void(* backward_gpu)(struct layer, struct network)
void(* update_gpu)(struct layer, update_args)
void(* forward)(struct layer, struct network)
void gradient_array(const float *x, const int n, const ACTIVATION a, float *delta)
void backward_deconvolutional_layer_gpu(layer l, network net)
void update_deconvolutional_layer_gpu(layer l, update_args a)
void fill_cpu(int N, float ALPHA, float *X, int INCX)
void axpy_cpu(int N, float ALPHA, float *X, int INCX, float *Y, int INCY)
void(* backward)(struct layer, struct network)
void bilinear_init(layer l)
void scal_cpu(int N, float ALPHA, float *X, int INCX)
void gemm_cpu(int TA, int TB, int M, int N, int K, float ALPHA, float *A, int lda, float *B, int ldb, float BETA, float *C, int ldc)
layer make_deconvolutional_layer(int batch, int h, int w, int c, int n, int size, int stride, int padding, ACTIVATION activation, int batch_normalize, int adam)
void im2col_cpu(float *data_im, int channels, int height, int width, int ksize, int stride, int pad, float *data_col)
void resize_deconvolutional_layer(layer *l, int h, int w)
float learning_rate_scale
void activate_array(float *x, const int n, const ACTIVATION a)
void forward_deconvolutional_layer_gpu(layer l, network net)
void backward_deconvolutional_layer(layer l, network net)
void forward_batchnorm_layer(layer l, network net)
void col2im_cpu(float *data_col, int channels, int height, int width, int ksize, int stride, int pad, float *data_im)
void backward_batchnorm_layer(layer l, network net)